Greetings,
In the spirit of DIY retro cards, my build of Alex Freed design Z80. Mine runs at 18.4MHz using a CMOS 20MHz part.This build was from 2021. I had to create the CPLD image from the VHDL and schematic. Boards were made by JCLPCB.Initial comparison with the A2Pico Z80 CP/M emulation card, it is quite bit faster on the ASCIIART benchmark.
Nice! I was looking at building one of those, but the CPLD kept me from it. The Freed design I'd really like to build is his 6809 card.
Do you have any spare Printed Circuit boards?
Really cool stuff and thanks for sharing. I have an affinity for Z80 cards for sure.
I found this extremely valuable page the other day, a reference of various Z80 cards for Apple II, browsing about my own [cards]. Seems this one is included there, impressively.
http://apple2.guidero.us/doku.php/mg_notes/cpm/cpm_combos
I do have two unpopulated PCBs left. Send me a PM if you're interestd in building one up.Cheers.
Right, there also was a discussion on comp.sys years ago where Alex participated whilst working on this card.This particular Z80-card design include on-board fast memory for the Z80. This memory is also mapped into the Apple 2 memory space, so Prodos, for example, have access to it if it so desire. Since the Z80 can operate without crossing the Apple memory barrier, it can really perform. Alex's 6809E-card design is nice also, however does not have the on-board memory. It would be possible to revisit that particular card if anyone is interestd in that.
I recently got a bare PCB of Alex's card off of eBay and am in the process of building it up. Unfortunately I haven't been able to find schematics or a BOM... the only thing I've located is the CPLD source, so I'm using the scant details and this picture to do it.
Most everything is pretty straightforward, but I have Five questions I hope someone can answer with one of these:
What's the value of C8?
What is U8?
What goes on the two pads on the backside of the card?
EDIT: I presume all the other capacitors are your typical 0.1uF bypass caps, save for the C1 and C2 which are matched for a crystal oscillator. I'm using a ceramic resonator so my understanding is that those parts should be unnecessary.
What are the values of R4 and R5?
I think with those details I can complete my build.
Hi,
Been a while since I played with these. Hope this will help.
C8 = 47uF, 16V electrol
U8=LM317LZ voltage regulater IC (3.3V)
Caps 0.1uF
I dont have a card in front of me to see the pads on backside. Jumpers for memory size? If you cant figure it out, let me know and I will search for my card.
I trust you have the Xilinx tools to flash the CPLD.
Good Luck, the card works well and is a fun project.
Hey, thanks for the information. Yes, I should have no trouble programming the CPLD at my work. That gets me closer, thanks. All that's left then are the resistors and the mystery unlabeled pads on the back. If I remember right from the info I found online, the jumper selects the size of the common memory bank, 8k or 16k.