IRQ

Can someone help that can read schematics.
On the CPU, the IRQ is lead to a box that contains the following
IRQ L, 2,3,4,7,5,8
What are these numbers? (and the L for that matter)

Hello wishtoknow,

the precise answer to this exceeds far the limits of a posting....
you could write a entire book about that topic......
I'll try to cut down the answer to a frank and simple answer here at the moment...

In general the IRQ (Interrupt Request ) handles the handshaking between the Interfacecards ( like serial comm,
printer etc. - i.e. peripherial devices ) and the CPU at the motherboard ( in more complex situation the CPU
on another CPU-Interface card like Z80 in CPM or 8086 at the PC-Transporter card or the 6809 at the Stellation Mill in OS9 ).

relation to MEGAII chip and the Slots:
It is related to the INT ( Interrupt signal and several other signals ( to get syncronized with them ).

while the INT signal is related to a daisy chain to handle priority of interfacecards from top priority of slot 7 down to
lowest priority of slot 1 ( i.e. external devices ) or internal devices like sound or joystick.

related to VGC-chip and the MEGA II chip:
Second you must bear in mind that a general cycle of the computer is split apart in 2 halfcycles
( one half dedicated to the CPU - i.e. "brain of the computer ) and the other cyclehalf dedicated to the
videodisplay of the contents in Memory in the RAM. During this aecond halfcyle the INT and INTREQ will be
ignored and have to "shut up" while display is performed - so they can "act" only in the first halfpart of
the cycle.

related to the DOC5503 chip / Ensoniq Chip:
The sound is just handled similar to the access of the joystick like another peripherial devices or CPU-cards .......

and there is a further close dependency to the so called "soft switches" ( specific memory locations )
that act like switches ( bit is 1 equals to "ON" or bit is = 0 equals to "OFF" ).....
this softswitches are used by software ( either in program or from code in Eprom of the interfacecard and pass
signal to or from CPU and to or from Interface that Data is to be picked up from Databus or that pickup is completed.....
INT signals demand for Pickup - and IRQ signals that either Data is availiable or pickup is completed...

2 things to bear in mind:
a) there was a development from Apple II where that has been handled by a bunch of logic chips
b) to the IIe where that bnch of logic-chips have been compacted to the MMU chip and the IOU chip as well as the HAL chip
c) and finaly the largest integration at the IIGS crunching the Handling down to the MEGAII chip and the VGCchip
keeping besides the HAL-chip for the more basical cycle-timing.
and seond the handling of "switched memory" caused by the adressing limits of the Apple II series to 64kB
and the 128 kB limitation at the IIe and finally the 16 MB at the IIGS - switching portions of the expanded video-memory to the
lower 64 kB portion of memory for the Videodisplay....which is also related to the handling of Interupts...

therefor i urgently recomend to read first the books:
JIM SATHER - understanding the Apple II or WINSTON GAYLOR - the Apple II circuit description
then continue with:
JIM SATHER - understanding the IIe
to understand the topic itself and the related topics...

the Keygloo is just another chip for communication with the kayboard acting also as peripherial device like sound or joystick...

don't forget: this is just a very compacted explenation.....
sincerely
speedyG

TP93 is just for measuring...