Apple 1 / Replica 1 in VHDL

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Apple 1 / Replica 1 in VHDL

I finally placed the replica 1 in vhdl on github
is is here: https://github.com/6502addict/Replica1

it works on a DE10-Lite board
if someone is interested I'll port it to other boards
it already worked on DE1, I'll add it later
I also have a DE1-SOC....

it has some extensions...
- a spi master controller (ca access a sdcard placed in a seed studio sdcard shield v4)
- a simple timer to compute the execution time of some functions

software contains some ai generated games
a spi library using a spi-master in vhdl in C200-C20F
a sdcard library using the spi library
a timer library to acess the timer in C210..C21F
a w25qxx library to initialise/read/write/erase some w25qxx spi flash

the terminal connected on arduino pin 0 and 1 must be configured at 115200 baud 8N1
the speed can be selected rom manual clock to 30Mhz via the 2 first switches

except for cpu65xx.vhd and cpu68.vhd
all other vhdl files are my own software

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Do you think it would fit in

Do you think it would fit in one of the TinyFPGA modules?  Those are a really inexpensive and simple FPGA for hobbiests with the software easy to get too.

 

https://tinyfpga.com/

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tiny FPGA

I only used the smallest tiny fpga it would not fit on it but I never saw the other versionit probably fit on an ICE40UP5K such as an icesugar

https://www.aliexpress.com/p/tesla-landing/index.html?scenario=c_ppc_item_bridge&productId=4001201771358

 

it probably fit on a MAX1000 from Trenz

https://www.arrow.com/fr-fr/products/max1000/trenz-electronic-gmbh?utm_currency=EURa bit latter I'll add the support of the Terasic DE1 board

i'ts an old board often sold on ebay I bought one for $54example:   https://www.ebay.com/itm/286675678895pay attention if one day you want to buy one of these board we find them between $35  and $500...if you want a brand new DE10-Lite mouser / digikey are far less expensive than ebay or the chineses 

it probably also fit some chinese modules... but they are often low end fpga 

and have not enough ebr blocks and need extra ram or sdram

(actually I don't have the controller for sdram)

 

I may eventually add more boards later....if you add one create a directory in replica1/board with  your board name then copy the content of DE10-lite directory

and adapt

 

 

 

 

 

 

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For sure not the A1 the AX2

For sure not the A1 the AX2 to unlikely.

The shiftregisters take a lot. Atleast if you try to do an exact VHDL model.

The EX should be able to hold an Apple II and my be even gs.

This https://wiki.sipeed.com/hardware/en/tang/Tang-Nano-9K/Nano-9K.html board is equipt with so much more and is only about 20€.

It can fit a Commodore VC20 https://github.com/MiSTle-Dev/VIC20Nano or NES https://github.com/Chandler-Kluser/nestang9k-ps2

The bigger version https://wiki.sipeed.com/hardware/en/tang/tang-nano-20k/nano-20k.html is about 36€ and es about an equivalent to the EX.

If can emulate a C64, SNES, Amiga 500 or Atari ST or Mac Plus and can give even HDMI output.

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Replica1 DE1 Board added

Support of the Terasic DE1  added to the projecthttps://www.terasic.com.tw/cgi-bin/page/archive.pl?No=83

 

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Today I added a 6809 core to

Today I added a 6809 core to the project

with my own monitor in software/mon6809in software/wozmon/wozmon6809.asm I placed the source code of the 6800 wozmon converted to 6809

 

 

I still have 2 problems

- le code is 4 bytes too long and overwrite the reserved and SWI3 interrupt vector

- even if it is running the code is behaving strangely

  probably a differences between the 6800 and 6809 flags or tests

 

if someone has an Idea I'm interested

 

 

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Where to find the code?

Where to find the code?

Sorry missed the link in the first post to your github.

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natas666 wrote:Where to find

I don't really know 6809 Assembly but with my little knowledge of 6502 Assembly I spotted the HEXA2BYTE function that looked to me as if it could be optimized. I asked Grok AI for it's opinion on this matter and it directly came up with a solution:

 

HEXA2BYTE JSR HEXA2NIBBLE

PSHS A

TFR B,A

JSR HEXA2NIBBLE

ASLA

ASLA

ASLA

ASLA

TFR A,B

PULS A

ROLB

ROLA

ROLB

ROLA

ROLB

ROLA

ROLB

ROLA

RTS

 

The AI optimized version looks like this:

HEXA2BYTE PSHS B

JSR HEXA2NIBBLE

LDB #$10

MUL

PULS A

JSR HEXA2NIBBLE

ABA

RTS

 

Explanation of optimization:

PSHS B and PULS A: Temporarily stores the lower hex character on the stack to free up B for multiplication.

MUL: Multiplies the high nibble (in A) by 16 ($10), which is equivalent to a left shift by 4 bits.

The result is stored in B (since the product is always <256), and A becomes 0.

Second JSR: Converts the low character (retrieved again in A) into a nibble.

ABA: Adds B (high nibble <<4) to A (low nibble). Since there is no bit overlap and no carry is generated, this results in the desired byte in A.

The rest of the original code (the 4 ASLA and 4 ROL pairs) is completely eliminated, which is the main source of the savings.

This version is functionally identical as long as the inputs are valid hex characters (as assumed in the original; error handling via carry flag is ignored).

It consumes less code memory and is also more cycle-efficient, but the question specifically referred to memory consumption.

 

Does that help you?

It looks plausible to me but I am still unsure if that really is equivalent working 6809 Assembly code

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