I have an Apple IIc Plus A2S4500 that isn't booting. I've spent about 10 hours on troubleshooting and I've reached a roadblock.
The 65c02 CPU isn't getting a clock signal.
Looking at the schematics, the clock signal is generated by the 84 pin Cache Glue Gate Array (CGGA) 344S0607-A at UD17 Pin 44. There is no clock output generated.
I'm also not getting any putouts on OE (pin 12) and WE (pin 14), which I belive should be generated by the CGGA.
I have swapped the CGGA chip with one from a working A2S4500 and I'm still not getting an output.
I checked the clock inputs to the CGGA and I'm getting a good clock on PH0 (Pin 49 1.02 mhz) and on Pin 2 (16 mhz input from Y3 oscillator).
+5V on VDD looks fine.
Does the CGGA chip anything else for it to generate the system clocks? Without the PCLK nothing else in the circuit will run, so I'm guessing the CGGA just acting as a clock divider and (I'm guessing here) should be taking 16mhz from Y3 (pin 2 input) and generating the PCLK?
I have not been able to find any documentation on the CGGA chip.
If anyone has any neat schematics I would appreciate a link to the file too. Best I could find was "IICPLUSSCHEMATIC" on schematicsforfree.com, as well as the schematics from the "Apple IIc Technical Reference Manual Second Edition" on page 453 (or 417 depending on which page numbers you're refering to). Both are a bit blurry.