Hi fans -
may may have followed the work done by two people on substituting the MMU, see here:
For those who don't know yet, the MMU and the IOU are full custom ICs in DIL-40 packages, whose design and manufacture Apple had commissioned to SYNERTEK. The initial versions were ready around end of 1981 / early 1982. They first appeared in the Apple IIe, and variants were used in the Apple IIc. From the documentation I could find it appears that they were made in an already obsolete NMOS process technology, much like the 6502 itself. So even if Apple had preserved the lithographic masks (or the GDS II data file thereof), nobody could produce them today anymore. NMOS long has gone the way of the dinosaur.
This is called "technical progress", folks. We can't make that old stuff anymore. And we can't fly men to the moon (and back) anymore, too.
THE MISSION STATEMENT AND THE OPTIONS
We need to make substitutes of the MMU and IOU (and the other custom IC seen in the Apple II family, like the IWM, and the SWIM).
There are basically two platform technologies which can be used to do that:
1) use a FPGA (Field Programmable Gate Array) and write the source code in VHDL (or Verilog).
2) use mid 1980s to early 1990s PLDs (Programmable Logic Devices) and write the source code in ABEL or any of the other proprietary PLD design languages, such as PALASM, CUPL, LOGIC, etc.
The originator ('frozen signal') of the above thread on the MMU chose to use 1), FPGA, while I chose 2), PLDs.
ADVANTAGES / DISADVANTAGES FPGA vs. PLD
FPGAs are much more powerful than PLDs and into the larger ones a whole Apple II including the 6502 CPU could be packed. Small FPGAs with fewer pins and in a small package can fit onto an adapter PCB the size of a DIL-40 IC and that contraption plugs right into the original MMU and IOU sockets on the original Apple IIe and Apple IIc motherboards. Great to repair Apple IIe and IIc with defective MMU or IOU.
PLDs are not that powerful, so more IC packages may be needed to implement the MMU or IOU functions. Larger CPLD ("Complex PLDs") of the early 1990s do have enough flipflops and 'product terms' inside to implement both the MMU and the IOU, the IWM and all the other TTLs seen in the Apple IIc into one package, but those IC packages from back in the day were physically much larger than the fine pitch (or the BGA) packages of modern FPGAs. So even with such a large CPLD which could hold all the functions, it would not fit on a PCB the size of a DIL-40.
So why use a PLD approach at all ?
The answer is this:
- if you want a solution which fits on a DIL-40 size PCB, use the modern FPGA and pay for the automated assembly by robots which is inevitable for such fine pitch or BGA packages. I don't say that it's impossible to solder these by hand, but the yield typically is low, and the ICs are ruined more often than not, if hand soldering is tried. The next drawback of these modern FPGAs run at low core voltages (extra regulator needed) and typically can't tolerate logic levels produced by TTL or CMOS running from a 5V supply, which is the case in the Apple II family. So additional voltage clamping and level translation circuits are likely needed around the FPGA, and these clutter up the PCB, and can't be hand soldered neither. Any bidirectional signals cause additional complications, because you need to add control signals to tell the level translators in which direction the level translated signal(s) flow at any given time. All this is not easy to do, and 'frozen_signal' can be applauded to have gone this much harder path.
- if you want a solution which can be put together by the average hobbyist using hand soldering, for instance, a replica of the Apple IIe or IIc, using a larger motherboard specifically designed for the MMU and IOU substitution PLDs, go for that ! There are no complications, all components are user friendly (they can be "handled" by human fingers) and everything still runs from a 5V supply, so no level translators are needed. This is what I want to do. I don't want to make drop-in MMU or IOU substitutes in a DIL-40 form factor. I want to design a motherboard for Apple IIe / IIc replicas, which allow builders not only to have the Apple IIe and IIc experience, but also allows them to make modifications, by reprogramming individual PLDs. Which, of course, should be in sockets. The in-circuit programmable ones a a bit tricky to use, especially when coming from different manufacturers. It could be done, but IMHO is not worth the effort, at least not for hobby projects. Back in the 1990s, I have witnessed too much debugging trouble with PCBs full of heterogenous in-circuit programmable PLDs, and don't want to go there.
So far for today. Running out of time. In my next post, I will explain the method I use to reverse-engineer, implement and verify such PLD based substitutes. This thread is meant to preserve these methods for posterity (and for those who want to step into my footsteps).
- Uncle Bernie