Up and running

I have officially moved into my new abode. I set up the development board and started testing the newest code. Since I had been unable to test the ROM, I have been working on the verilog version of the CPU. Under simulation, it appeared to work. But simulation only executed about a dozen or two instructions. When I programmed the development board, it failed. It seems to be failing in a loop that uses Y as an index register into a string of character and prints it on the screen. It prints the first charcter and appears to continue running the same loop and never incrementing the Y register. I did not have much time to debug. I did find one bad constant reference, but the correct one was the same value.

The debug should not be too hard and hopefully the Verilog 6502 will be up and running. This will allow me to upgrade the 6502 to 65C02 than maybe even a 65816. The 65C02 seems fairly easy, but I already see a few minor issues. I am approaching the point where the CPLD is being fully utilized. The Verilog 6502 is bigger than the VHDL version. When I get the basic APPLE ][ booting, I may have to sever the OSI code to make room for the additional APPLE features. My preference would be for both to work, but if they have to be seperated, so be it. I already have the LPC code for the boot prom and IDE code for the compact flash. The only remaining pieces are the keyboard, full memory management, some parts of the 6551 UART, and the floppy emulation.