6300CD ram ceiling?

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6300CD ram ceiling?

was wondering if its actually fixed to 64mb max from two 32mb or have someone figured some clever configuration that went higher than this?

I know what kind of system a 6300CD is but I had to ask anyhow Blum 3

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6300 RAM

Hey,

From what I remember and what I can check in terms of resources, the answer is "yes" it is fixed. Some Macs using 72-pin RAM can exceed the stated limit by Apple such as the 6100 but the 6200/6300 series wasn't a brilliant milestone by Cupertino, if you get my drift.

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what/who is 'Cupertino' anyho

what/who is 'Cupertino' anyhow? just wondering so I could get the whole drift Biggrin

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Cupertino

Hey,

Sorry. Silly code. Cupertino is the home base of Apple Computer, Inc.

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That's something I tried. I h

That's something I tried. I had some 64mb SIMMs that worked in a 6100 and a 575 but in a 6300 two 64mb SIMMs together wouldn't show up any higher than 64mb total.

Wayne

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hmm thanks wayne..looks like

hmm thanks wayne..looks like it truely is fixed to 64mb there

at least its good enough amount for os 8.6 at home anyhow so not too worried Smile Biggrin

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I saw a 6200 advertised with...

I saw a 6200 advertised a while back that had 128MB of RAM installed. I don't know that the 6200 actually saw all 128MB, but the owner *did* have 128MB of RAM installed in the 6200.

I'm thinking that the RAM ceilings on the Performas might be hit and miss... i.e. some do and some don't.

A curious tangent: I had an LC575 that would not accept any SIMM that was not double-sided. Another local fellow had an LC575 that would accept just about any 72-pin SIMM under the Sun. Actually kind of strange, but it's most certainly true.

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hmm interesting story you had

hmm interesting story you had there

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PDS Expansion

I think I have heard of such thing as a PDS memory expansion card.

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Joined: Aug 15 2004 - 19:24
PDS memory?

Hey,

Really? Where? Any details?

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Joined: Dec 20 2003 - 10:38
RAM cielings occur for 2 reas

RAM cielings occur for 2 reasons:

1. Limited number of address likes coming out of the controller (capacity is expressed by 2 to the power of the number of address lines)

2. Controllers only know how to control the highest density devices that were available at the time it was designed. For example, the MPC106 we used in the G3 can't control any DRAM chip greather than 128 megabit.

Now the obvious question is, the OS supports 32 bit addressing, why doesn't the memory controller? The answer is, back in those days, real estate on custom ASIC's was very expensive and so to save costs, it was designed simpler with fewer features.

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