Timing parameters for the 6522 VIA

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Timing parameters for the 6522 VIA

Can any one please help me with this “Apple ll Computer Family Technical Information A2TIL039.TXT” note? Found on this link;


The schematic shows an ‘8304’ but makes no mention of it in the text. What component is this?

Many thanks.

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Re: Timing parameters for the 6522 VIA

I believe you can replace this chip with a 74LS245.
It's an octal bus transceiver located near the 6502 microprocessor.
Hope that helps..

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Re: Timing parameters for the 6522 VIA

74LS245 sounds about right or maybe 74F545 or a real one

MarkO's picture
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Re: Timing parameters for the 6522 VIA

The Text of A2TIL039.TXT mentions a 74LS74 for creating a Delay from the Positive Edge of the Clock..

I would guess that the creator of the Document copied the Date of the Chip ( 8304 ) rather than the Part Number when making the diagram...

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Re: Timing parameters for the 6522 VIA

A 74LS245 bus transceiver for interfacing to the data bus works fine in place of the 8304. I have a protoboard available that incorporates a 6522A VIA and an EEPROM, which might save you some time. Detailed documentation can be found at:

Mike W.

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Re: Timing parameters for the 6522 VIA

For a little more history:

If you just want to hook up a 6522, you can skip the '245. It becomes necessary when additional logic sits on the adapter card. The issue with the timing of the 6522 is the phi2 signal. Woz, for reasons unknown to us mortals, left this 6502 signal off the Apple II bus. Perhaps because inverting phi1 was probably "good enough". Except for the 6522. Reconstructing a proper phi2 is a PITA. I had success by running phi1 through 3 inverters. In the middle was a small capacitor to ground to "delay" the edge somewhat. Not very good engineering, but that was all I had in my toolbox. If you want to play with the 6522, and I highly recommend you do, then get Mike's proto board (you won't believe how handy the EEPROM is).


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