I noticed the 65C816->65C02 Board on a2heaven.
Does this function as a ZIP chip did in the //e ? The page states that it runs up to 14 MHz, but it doesn't say if it supports running standard software at higher speed as the ZIP chip did, via a switch of some sort, or how you toggle the mode or set the clk; or if it only allows you to make custom software that can take advantage of the 65c816.
Has anyone here used this product? It's bloody cheap so I may buy one ust for fun, should I want to write any software to take advantage of such a hybrid instr set.
The 65C816 has nothing to do with the ZIP chip. This is just a replacement CPU that can be used to take advantage of the new features of this CPU. It will only run at the speed of the device into which it is inserted (1MHz for standard II; 1 or 4MHz in //c+). If you want an accelerator then check out the FASTCHIP //E.
I have one in a //e. It does not increase the clock speed at all, it just gives you the 16 bit instructions.
However, I believe, but have not tried it, that you might be able to put one into an accellerator card like a Transwarp, Titan Acellerator //e or MCT SpeedDemon and be able to mod those to run higher than their original speed. Plus be able to use the 16 bit instructions.
FWIW, I got the one I have because I wanted to use 16 bit instructions for a particular project. Unfortunately I haven't gotten to it yet.
I also think that this 65816 may run in a Transwarp (I don't know the other accelerator boards). In 1986 I bought my Transwarp and a few months later I changed to a 65802. This CPU ran well at 3,6MHz. But you cannot modify the frequency. In late 1987 I bought my next accelerator board: the DC65 from Schaetzle&Bsteh (in West Germany) running the CMOS instruction set on 144kB ultra fast SRAM at 12,5MHz. So I sold my Transwarp. A few years ago I got my old Transwarp back :-) I will do some experiments in the future.
Very good. I didn't expect it to be a slotless accelerator, but the page for it states 'up to 14Mhz', which is ambiguous.
Should I want the 65c816 instructions in the future, it may be interesting to have it, but developing for that product feels about the same as developing for the C64 80-column cards. e.g., Not enoug people will have the bloody thing to make it viable to write for it.
If I were to want to speed up a //e, I'd use the original ZIP chip. It's slotless, and makes GEOS, MouseDesk, AppleWorks, and various compilers fast, and very responsive, without harming how other software runs (standard speed). I typically have every slot loaded in my machines, so sparing one for a speed boost that I do not require isn't costless.
I wonder why this hasn't been cloned? Seems like a good FPGA project, IMHO.
I may buy one of the 65c816 modules just to have the option to tinker with the instruction set a bit.
What are you planning to create to uitilise it?