I'm trying to understand the Apple 1, Terminal section, circuit operation. I ran across a pretty good description of parts of it at:
However, it doesn't explain in detail the timing / control signal generation. So I'm trying to do that myself. I've figured out that D6 and D7 count out 165 character timeslots for each horizontal scan line, and that D8 counts 8 scan lines per character row, and part of the character row count, along with D9. At some point in the vertical row count, D8 and D9 are preset (to F and B respectively?), altering the count sequence in such a way as to be able to count 262 scan lines, or 32.75 character rows before the vertical count sequence repeats itself.
Where I'm stuck is understanding what the signals NOT WC1 and NOT WC2 represent. I need to know about NOT WC1 because it is involved (as an input to C9) in determining when the preset inputs to D8 and D9 go low, presetting these counters.
Signal VINH, generated by D15, is also involved in the vertical row countdown process somehow, but I haven't spent much time on it yet, since I got stuck on WC1.
I did notice what seems to be an error (or probably something I've missed) in that VINH is generated at D15, pin 13, but it's inverse, NOT VINH, appears as the CEP input to D8 and D9, but I don't see any circuitry inverting VINH to NOT VINH anywhere.
Can anyone help me with these questions?
The VINH signal goes directly from D15-13 to D8 and D9, pin 7 and it is not inverted. The schematics are in error.
I haven't spent the time to complete understand the cursor wrap logic, but I believe that is what WC stands for. When the return character is entered, the remainder of that line must be cleared before setting the cursor to the next line. This is some pretty clever logic and I'm sure it will take some studying to completely understand.
Thanks for the info. I had assumed that the schematic was in error. BTW, you may know this already, but the purpose of the VINH signal is to "delay" the vertical counter so that it resets itself at a count of 262 (horizontal scan lines) rather than 256.
I should be able to figure out the wrap cursor logic, now that I know what its purpose is, and now that I think I have the horizontal and vertical count sequences figured out.
I'm just curious; how did you come to be so familiar with this circuit?
I'm building an Apple 1 clone.
I've already built an Apple II (rev 0) and there is a lot similarity with the video timing being driven by those counter chips in both cases.