glb_gtz's blog

How slow is too slow?

In my debug of the Verilog 6502, I noticed that the code was not cycle accurate with the NMOS 6502. A lot of common instructions take an extra cycle. The means that most of the time it will be running 25% - 33% slower. For me, that is unacceptable. I have been playing with writing a cycle accurate version. It is doable, but it will take a lot longer. So I am going to put that on the back burner in favor of getting the APPLE to boot. I will have to make sure I use just the 6502 ROMs.

Up and running

I have officially moved into my new abode. I set up the development board and started testing the newest code. Since I had been unable to test the ROM, I have been working on the verilog version of the CPU. Under simulation, it appeared to work. But simulation only executed about a dozen or two instructions. When I programmed the development board, it failed. It seems to be failing in a loop that uses Y as an index register into a string of character and prints it on the screen.


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